Samsung Interview Question
Software Engineer / DevelopersTeam: networking
Country: India
Interview Type: In-Person
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Latency:
- acoder September 17, 2014in modern processors a memory access can go through multiple levels of caches and main memory. Depending on where the accessed data is, the latency of the access can go from a few cycles to hundred or thousands of them. When possible, a programmer should be careful to access memory with high locality. For example, If an image is stored in contiguous memory, with consecutive pixels in a raw occupying consecutive words in memory, a filter scanning the image should have the inner loop on columns and the outer on rows.
Coherency:
Not all multi-core architectures guarantee cache coherency across cores. In such cases, the developer has to make sure data accessed by more than one core is properly made coherent in caches.
Excessive use of memory/page trashing: An application using an eccessive amount of memory can either run out or, in systems with virtual memory, cause trashing of loaded pages, causing excessive page swapping.