NetApp Interview Question
Software Engineer / Developers1. User process called a system call.
2. Disable interrupts.
3. Copy arguments and system call number to registers.
4. Process would be waiting.
5. Context switch.
6. Copies arguments from registers to kernel stack.
7. Re-enable interrupts.
8. Depending on system call number, execute the interrupt service routine. This is obtained from Syscall Dispatch table.
9. Copy the results to registers.
10. Scheduler moves the user process from waiting state to ready state.
11. Context switch.
12. User process gets its results from the registers (From step 9).
Sorry guyz.. there are some mistakes in the above description.. viewers discretion is expected. I tried my best below:
1. User process called a system call.
2. Disable interrupts.
3. Copy arguments and system call number to registers.
4. Process would be in ready state though not running.
5. Mode switch to Kernel mode.
6. Copies arguments from registers to kernel stack.
7. Re-enable interrupts.
8. Depending on system call number, execute the interrupt service routine. This is obtained from Syscall Dispatch table.
8.a. Depending on the kind of system call the user process might be moved to blocked queue.
9. Copy the results to registers.
9.a. Scheduler might have to move the process from blocked queue to ready queue.
10. Mode switch to User mode.
11. User process gets its results from the registers (From step 9).
Is an ISR called only when a system call is encountered..???
What about the hardware interrupts..lyk clock, disk drivers,etc...??
@Sam: The que. says.. what happens in an ISR.. and you r talkin sum other useless stuff.
• the main program is being executed
• an interrupt (hardware signal) is requested by some external device
• the interrupt is ignored until the current instruction has been completed (up to 174 clocks on 68000)
• instruction pointer is saved in the stack (IPOLD points to the next instruction of main program)
• program status is saved
• IP is loaded with interrupt service routine, ISR, address (interrupt vector)
• ISR is now executed and interrupts are disabled to avoid re-entrancy
• ISR saves program context (CPU registers)
• ISR resets hardware that created interrupt (EOI_REG, external flip-flop, status register of PI/T...)
• ISR services the interrupt (read keyboard, read A/D, write to USART,...)
• ISR restores program context reloading CPU registers
• ISR re-enables interrupts
• return from interrupt restoring IPOLD (RETE)
• the normal program is resumed from the instruction immediately after the last instruction completed before servicing the interrupt.
1. Interrupt request(IRQ) signal is sent by the device to the processor.
- surya November 26, 20112. If the interrupt line is enabled the following sequence of events occur in the system, else the interrupt is ignored. The processor completes its present instruction (if any) and pay attention to the IRQ.
3. It stores the address of the next location and content of status register to the stack
4. It informs the device that its request has been granted and in response the device de-activates its IRQ.
5. Using some suitable technique the processor loads its program counter(PC) with address of the ISR.
6. With return statement occurring at the end of the ISR all stored content is loaded back into the respective registers and the processor resumes its suspended program